Abstract: Anodic bonding is a common method for achieving silicon-to-glass encapsulation in micro-nano processing. The existing anodic bonding process involves applying a constant high voltage and high voltage temperature to induce the formation of new chemical bonds at the silicon/glass interface. A staircase waveform-based method instead of applying a constant voltage was proposed to enhance the performance of anodic bonding. Through equivalent physical model and actual test results, the change of bonding current during silicon/BF33 glass anodic bonding under different voltage conditions was analyzed. The transfer amount of Na⁺ under different voltage conditions was calculated, and the micro bonding interface was observed by scanning electron microscope (SEM) and energy dispersive X-ray spectrometer (EDX). The results show that the staircase waveform-based voltage method contributes to the formation of a wider depletion layer, thereby increasing the number of chemical bonds at the interface. The bonding strength of BF33 glass and silicon characterized by tensile tests improves obviously, which can fulfill the requirements for the encapsulation of general devices. For the non-planar interface silicon/BF33 glass with Pt/Ti metal step microstructure with a thickness of 120 nm, the staircase voltage bonding method can reduce gaps at the edges of the step, which improves the sealing effect of the bonding interface. The research results promote the improvement of anodic bonding quality and expand the application range of the process.